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NOC:Digital VLSI Testing
broucher Course Brochure
NOC:Digital VLSI Testing
by Prof Santanu Chattopadhyay

Design for testing or design for testability (DFT) consists of IC design techniques that add testability features to a hardware product design. The added features make it easier to develop and apply manufacturing tests to the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no manufacturing def...

5.0  (841 Ratings) 1090 Learner
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level All Level
level English
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Program Fee
FREE
About This Course

Design for testing or design for testability (DFT) consists of IC design techniques that add testability features to a hardware product design. The added features make it easier to develop and apply manufacturing tests to the designed hardware. The purpose of manufacturing tests is to validate that the product hardware contains no manufacturing def...

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Course Curriculum
12 Sections | 60 Lecture | 24h 34min total length
Expand all sections
NOC:Digital VLSI Testing

Week 1

| 02h 23min total length
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    Lecture 5: DFT

    28m <?php echo $alt; ?>
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    Lecture 4: Introduction (Contd.)

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    Lecture 3: Introduction (Contd.)

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    Lecture 2: Introduction (Contd.)

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    Lecture 1: Introduction

    28m <?php echo $alt; ?>
NOC:Digital VLSI Testing

Week 2

| 01h 34min total length
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    Lecture 10:DFT (Contd.)

    18m <?php echo $alt; ?>
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    Lecture 9: DFT (Contd.)

    18m <?php echo $alt; ?>
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    Lecture 8: DFT (Contd.)

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    Lecture 7: DFT (Contd.)

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    Lecture 6: DFT (Contd.)

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NOC:Digital VLSI Testing

Week 3

| 01h 00min total length
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    Lecture 16: Logic and Fault Simulation (Contd.)

    10m <?php echo $alt; ?>
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    Lecture 15: Logic and Fault Simulation (Contd.)

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    Lecture 14: Logic and Fault Simulation (Contd.)

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    Lecture 13: Logic and Fault Simulation (Contd.)

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    Lecture 12: Logic and Fault Simulation (Contd.)

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    Lecture 11: Logic and Fault Simulation

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NOC:Digital VLSI Testing

Week 4

| 02h 19min total length
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    Lecture 21: Test Generation (Contd.)

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    Lecture 20: Test Generation (Contd.)

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    Lecture 19: Test Generation (Contd.)

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    Lecture 18: Test Generation (Contd.)

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    Lecture 17: Test Generation

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NOC:Digital VLSI Testing

Week 5

| 02h 31min total length
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    Lecture 26: Logic BIST (Contd.)

    30m <?php echo $alt; ?>
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    Lecture 25: Logic BIST (Contd.)

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    Lecture 24: Logic BIST

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    Lecture 23: Test Generation (Contd.)

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    Lecture 22: Test Generation (Contd.)

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NOC:Digital VLSI Testing

Week 6

| 02h 15min total length
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    Lecture 31: Test Compression (Contd.)

    27m <?php echo $alt; ?>
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    Lecture 30: Test Compression (Contd.)

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    Lecture 29: Test Compression (Contd.)

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    Lecture 28: Test Compression

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    Lecture 27: Logic BIST (Contd.)

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NOC:Digital VLSI Testing

Week 7

| 02h 19min total length
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    Lecture 32: Low Power Testing

    27m <?php echo $alt; ?>
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    Lecture 33: Low Power Testing (Contd.)

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    Lecture 34: Low Power Testing (Contd.)

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    Lecture 35: Low Power Testing (Contd.)

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    Lecture 36: Low Power Testing (Contd.)

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NOC:Digital VLSI Testing

Week 8

| 02h 14min total length
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    Lecture 37 : Thermal Aware Testing

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    Lecture 38 : Thermal Aware Testing (Contd.)

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    Lecture 39 : Thermal Aware Testing (Contd.)

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    Lecture 40 : Boundary Scan

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    Lecture 41 : Boundary Scan (Contd.)

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NOC:Digital VLSI Testing

Week 9

| 02h 17min total length
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    Lecture 42 : Boundary Scan (Contd.)

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    Lecture 43 : Boundary Scan (Contd.)

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    Lecture 44 : Boundary Scan (Contd.)

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    Lecture 45 : System/Network - On - Chip Test

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    Lecture 46 : System/Network - On - Chip Test (Contd.)

    27m <?php echo $alt; ?>
NOC:Digital VLSI Testing

Week 10

| 02h 07min total length
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    Lecture 51 : System/Network - On - Chip Test (Contd.)

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    Lecture 50 : System/Network - On - Chip Test (Contd.)

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    Lecture 49 : System/Network - On - Chip Test (Contd.)

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    Lecture 48 : System/Network - On - Chip Test (Contd.)

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    Lecture 47 : System/Network - On - Chip Test (Contd.)

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NOC:Digital VLSI Testing

Week 11

| 02h 01min total length
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    Lecture 56 : System/Network - On - Chip Test (Contd.)

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    Lecture 55 : System/Network - On - Chip Test (Contd.)

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    Lecture 54 : System/Network - On - Chip Test (Contd.)

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    Lecture 53 : System/Network - On - Chip Test (Contd.)

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    Lecture 52 : System/Network - On - Chip Test (Contd.)

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NOC:Digital VLSI Testing

Week 12

| 01h 28min total length
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    Lecture 60 : Memory Testing (Contd.)

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    Lecture 59 : Memory Testing (Contd.)

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    Lecture 58:Memory Testing (Contd.)

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    Lecture 57 : Memory Testing

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show 9 more sections

Review & Ratings

5.0
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Yogesh Chavda

28 Apr 2021 09:52 AM

It is good to go for this course if you are interested in the VLSI system and testing.

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YASHVANT CHOVATIYA

24 Apr 2021 11:03 AM

Learn lots of stuff

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VIJAYBHAI MAKWANA

22 Apr 2021 03:44 PM

Good

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