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Goraksha Dadhich
18 Apr 2019 11:11 AM study24x7 study24x7

 Timing jitter can be reduced by

A

Good power supply isolation

B

Stable clock reference

C

Good power supply isolation & Stable clock reference

D

None of the mentioned

Banking Railways UPSC Sciences
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  • geet sharma
    • Jitter occurs when there is a slight position change in the sampled signals. This timing jitter can be controlled by power supply isolation and clock reference.
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    Reply 18 Apr 2019 12:32 PM
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