Is VHDL a high level language?I mean its a mix of a high level language and an assembly language. VHDL is a hardware description language(HDL) . ... The memory and other logic elements are limited in a FPGA(where you normally put the VHDL code in). This is why it is very difficult to implement image processing algorithms in VHDL than in C.

Question

Is VHDL a high level language?I mean its a mix of a high level language and an assembly language. VHDL is a hardware description language(HDL) . ... The memory and other logic elements are limited in a FPGA(where you normally put the VHDL code in). This is why it is very difficult to implement image processing algorithms in VHDL than in C.

Goraksha Dadhich · Accepted Answer

Is VHDL a high level language?I mean its a mix of a high level language and an assembly language. VHDL is a hardware description language(HDL) . ... The memory and other logic elements are limited in a FPGA(where you normally put the VHDL code in). This is why it is very difficult to implement image processing algorithms in VHDL than in C.

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